Computer Architecture (Fall 2019) | SNU Systems Software & Architecture Laboratory


   We will have the final exam from 9:30am to 10:45am on December 12th at the lecture room #301-203. The scope is Chap. 4 and 5 (except Chap. 4.12-4.13, 5.5-5.6, 5.9-5.12, 5.14-5.15) in the textbook, RISC-V assembly, and those materials covered by lecture slides and project assignments (especially, snurisc5 and snurisc3). It will be a closed-book exam.

(Posted Dec 5, 2019)

   The grading script for the final project is now up and running. Please remove any print() statement before submission. The grading server will be open by Dec. 15.

(Posted Dec 1, 2019)

   The final project has been announced. Please find more information here.

(Posted Nov 19, 2019)


The following schedule is tentative and subject to change without notice.

Day Topic Reading
9/3 Course Overview (Revised on 9/16) Chap. 1 (except 1.6, 1.9)
9/10 Integers (Revised on 9/16) Chap. 2.4, 3.1-3.4, 3.6
9/12 National Holiday
9/19 Floating Points Chap. 2.3, 2.9, 3.5, 3.9-3.10
9/20 Supplementary Class (6:30pm ~ 8:30pm)
9/24 RISC-V Architecture I (Revised on 9/25) Chap. 2.1-2.3, 2.6
10/1 RISC-V Architecture II (Revised on 10/5) Chap. 2.7-2.8, 2.10, 2.13-2.14
10/3 National Holiday
10/4 Supplementary Class (6:30pm ~ 8:30pm @ 301-302)
10/8 Machine-level Representation of Programs Chap. 2.5, 2.12
10/10 CISC vs. RISC Chap. 2.16-2.20
10/15 School Holiday
10/17 Midterm Exam
10/22 Logic Design Chap. 4.2, Appendix A
10/24 Performance Chap. 1.6, 1.9, 2.13
10/29 Sequential Processor Chap. 4.1, 4.3-4.4
10/31 Pipelining Chap. 4.5
11/7 Pipelined Processor Chap. 4.6-4.9
11/14 Advanced Processor Architecture Chap. 4.10-4.11, 4.14-4.15
11/15 Supplementary Class (6:30pm ~ 8:30pm @ 301-302)
11/19 Memory Hierarchy Chap. 5.1-5.2
11/21 Cache Chap. 5.3
11/26 Cache Optimization Chap. 5.4
12/3 Virtual Memory Chap. 5.7-5.8, 5.13, 5.16-5.17
12/10 Course Wrap-up
12/12 Final Exam

Credit: Most of slides for this lecture are based on materials provided by the textbook publisher.


For project submission and automatic grading, we are running a dedicated server at If you want to access the sys server outside of the SNU campus, please send a mail to the instructor.

Project #4: A 3-Stage Pipelined RISC-V Simulator

The goal of this project is to understand how a pipelined processor works. You need to build a 3-stage pipelined RISC-V simulator called “snurisc3” in Python that supports most of RV32I base instruction set.

  • Project specification and skeleton code available here
  • Due date: 11:59PM, December 10.

Project #3: RISC-V Assembly Programming

The goal of this project is to give you an opportunity to practice RISC-V assembly programming. In addition, this project introduces various RISC-V tools that help you compile and run your RISC-V programs.

  • Project specification and skeleton code available here
  • Due date: 11:59PM, November 10.

Project #2: Half-precision Floating Points

The goal of this project is to get familiar with the floating-point representation by implementing the 16-bit half-precision floating-point representation.

  • Project specification and skeleton code available here
  • Due date: 11:59PM, October 21.

Project #1: 64-bit Integer Arithmetic using 32-bit Operations

The purpose of this project is to become more familiar with the binary representation of integers and to understand the arithmetic operations between two integers. Another goal is to make your Linux or MacOS development environment ready and to get familiar with our project submission server.

  • Project specification and skeleton code available here
  • Due date: 11:59PM, September 22.

Course Information

When 9:30 - 10:45 (Tuesday / Thursday)
Where Lecture room #301-203, Engineering Building I
Instructor Jin-Soo Kim
Professor, Dept. of Computer Science and Engineering, SNU
Language English
Course Description This course introduces the main components of a modern computer system including the instruction set, the processor, and the memory hierarchy. We cover techniques such as pipelining, caching, and virtual memory. In addition, this course gives a historical perspective on the evolution of computer systems and an overview of performance evaluation methodologies.
Textbook David A. Patterson and John L. Hennessy, Computer Organization and Design: RISC-V Edition, First Edition, Morgan Kaufmann, 2017.
Reference Randal E. Bryant and David R. O’Hallaron, Computer Systems: A Programmer’s Perspective, 3rd Edition, Pearson Education Limited, 2016.
Prerequisites 4190.103A Programming Practice
M1522.000700 Logic Design
Basic knowledge of C programming on Linux
Grading Exams: 60% (Midterm 25%, Final 35%)
Projects: 40% (4 ~ 5 project assignments planned)
* Grading policy is subject to change
Teaching Assistant Jaehoon Shim,
Yeonkyu Jeong