The following schedule is tentative and subject to change without notice.

Credit: Most of slides for this lecture are based on materials provided by the authors of the textbook and references.

For project submission and automatic grading, we are running a dedicated server at https://sys.snu.ac.kr. If you want to access the sys server outside of the SNU campus, please send a request via a Google Form whose URL is posted in the eTL.

Project #5: xFFS: Faster File System for xv6

Inspired by the classic BSD Fast File System (FFS), xFFS extends the original xv6 file system with the concept of block groups (a.k.a. cylinder groups). This architectural change co-locates related data and metadata on the disk to reduce disk seek latency and boost file system throughput. The goal of this project is to implement block groups and a locality-aware allocation policy in xv6, while preserving the original on-disk layout as much as possible.

• Project specification available here
• Due date: 11:59PM, December 21 (Sunday).

Project #4: P³: Per-Process Paging

In this project, you will implement per-process paging in xv6, enforcing a per-process limit on physical memory usage; when a process exceeds its quota, excess pages must be evicted to the swap device and brought back on demand upon page faults. The choice of page replacement policy is crucial because it dictates which pages are evicted, directly affecting page-fault rates, I/O overhead, and overall performance. The goal of this project is to understand xv6’s virtual memory subsystem and explore the challenges and design trade-offs involved in supporting swapping.

• Project specification available here
• Due date: 11:59PM, November 30 (Sunday).

Project #3: The Road to Balance

Modern OS schedulers support CPU affinity—binding a process (or its threads) to a subset of CPU cores—to preserve cache locality and reduce interference from other processes, while also load balancing to maximize throughput by keeping all cores busy. In this project, you will extend xv6’s scheduler with CPU affinity and design your own multicore load balancing strategy that achieves measurable improvements in completion time under imbalanced workloads. The goal is to understand xv6’s scheduling subsystem and modernize it toward an affinity-aware, scalable multicore scheduler.

• Project specification available here
• Due date: 11:59PM, November 6 (Thursday).

Project #2: Ping, Pong

An Inter-Processor Interrupt (IPI) is a hardware-delivered signal from one CPU core to another, which is the kernel’s primary low-latency mechanism for coordinating work on multicore systems. In this project, you will implement a minimal IPI mechanism in xv6 that lets one RISC-V hart simply ring a “doorbell” on another. The goal is to deepen your understanding of xv6 system calls and interrupt handling on the RISC-V architecture.

• Project specification available here
• Due date: 11:59 PM, October 12 (Sunday).

Project #1: Hello world, xv6

xv6 is an instructional operating system developed by MIT based on Ken Thompson and Dennis Ritchie’s Unix version 6 (v6). In this course, we will use xv6-riscv, a version recently ported to a multi-core RISC-V machine. The goal of this project is to set up your development environment on Linux or macOS and familiarize yourself with our project submission server.

• Project specification available here
• Due date: 11:59 PM, September 21 (Sunday).

xv6 Resources

• xv6 source code: https://github.com/snu-csl/xv6-riscv-snu (our customized version)
• xv6: a simple, Unix-like teaching operating system (Rev. 5)
• The RISC-V Reader: An Open Architecture Atlas
• RISC-V Instruction Set Manual Volume I: Unprivileged Architecture, Version 20250508
• RISC-V Instruction Set Manual Volume II: Privileged Architecture, Version 20250508